1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. More particularly, the invention relates to a semiconductor device comprising resistor elements and to a method for manufacturing that device.
2. Background Art
Resistor elements included in a semiconductor device fall into two major categories: diffusion resistances utilizing a diffusion layer formed on the surface of a semiconductor substrate, and polysilicon resistances employing a polycrystal silicon film. The resistor elements composed of polysilicon resistances are furnished in many cases over an element isolating film on the semiconductor substrate.
FIGS. 13A, 13B and 13C are schematic views showing how resistor elements are formed illustratively using a gate layer on an element isolating oxide film. FIG. 13A is a plan view of a semiconductor device comprising resistor elements, and FIGS. 13B and 13C are cross-sectional views taken on a dashed line IV—IV in FIG. 13A.
As semiconductor devices are getting finer in structure today, it is customary to have their elements isolated by the so-called shallow trench isolation (STI) process involving chemical mechanical polishing (CMP). With the semiconductor shown in FIGS. 13A through 13C, element isolation over a semiconductor substrate 101 is accomplished by means of an element isolating oxide film 102 formed by STI. The element isolating oxide film 102 is manufactured by STI as follows: trenches are first etched on the semiconductor substrate 101. The trenches are then filled with an insulating film such as a silicon oxide film deposited all over the substrate surface. Excess insulating film portions outside the regions covering the trenches are removed by CMP, leaving the insulating film regions in place.
With the semiconductor device in FIGS. 13A through 13C, a plurality of resistor elements 104 are formed on the element isolating oxide film 102 after fabrication of the film 102. Each resistor element 104 is connected in a subsequent wiring process to a wiring layer 105 located above the element with a contact layer 106 interposed therebetween. The resistor elements 104 measure about 100 μm in total length (L) each. Because a large number of resistor elements 104 need to be formed on the semiconductor substrate 101, it is common practice to form initially an extensive element isolating oxide film 102 and then deposit the numerous resistor elements 104 collectively over the film 102.
The resistance value of the resistor elements 104 thus manufactured is determined by diverse factors: pattern width, total element length and element thickness, as well as by the manner in which the film is grown, the density of impurities implanted, profiles in the direction of thickness, and the type of heat treatment applied.
One disadvantage involved in forming the element isolating oxide film 102 over an extensive area is what is known as the “oxide dishing” problem occurring during planarization by CMP, a phenomenon in which the middle portion of the film 102 tends to become thinner than the remaining portions of the film. The problem is attributable to the fact that the amount of CMP becomes greater the closer the polishing location to the center of the element isolating oxide film 102 away from its periphery. The dishing phenomenon results in a concave formation in the middle of the element isolating oxide film 102, as shown in FIG. 13C.
Manufacturing the resistor elements 104 on such a concave-shaped element isolating oxide film 102 leads to differences in shape between the elements 104 in the middle of the film 102 on the one hand, and the elements 104 near the periphery of the film on the other hand.
The differences in element shape take on three major manifestations: (1) a polycrystal silicon film, formed as the material of the resistor elements 104 on the concave-shaped element isolating oxide film 102, tends to be thicker in the middle than near the periphery; (2) the staggered heights of the resistor elements 104 cause differences in width between the elements 104; and (3) there occur differences in cross-sectional shape between the resistor elements 104. Those differences become more pronounced the greater the width of the element isolating oxide film 102.
FIG. 14 is a characteristic diagram, a graphic representation showing relations (plotted by a solid line) of the center height (H) of the element isolating oxide film 102 with regard to the width of the film 102, in comparison with relations (plotted by a dotted line) of the amount of shift in total length (Lshift) of the resistor elements 104 with respect to the width of the element isolating oxide film 102. As illustrated in FIG. 14, the height of the element isolating oxide film 102 diminishes and the amount of shift in total length of the resistor elements 104 increases the greater the width of film 102. In particular, when the width of the element isolating oxide film 102 is 100 μm, the amount of shift in total length of the resistor elements 104 is as much as 13 percent. That means the shift in resistance value will amount to 13 percent as well.
As outlined above, conventional techniques have so far failed to maintain the resistor elements 104 in a consistent shape during fabrication on the element isolating oxide film 102. The failure has produced differences in resistance value between the resistor elements 104, making it difficult for the elements to be adopted in circuits of high precision requirements such as analog circuits.